Samples: 5K of event 'cpu-clock', 999 Hz, Event count (approx.): 5010010005, [percent: local period] instance int32 [benchapp] Benchmarks::Medium()[OptimizedTier1]() /tmp/jitted-45672-26738.so 0.64 stp x29, x30, [sp, #-16]! 1.29 mov x29, sp 0.84 ldr x0, [x0, #8] 0.69 ↓ cbz x0, 118 0.77 add x1, x0, #0x10 0.75 ldr w0, [x0, #8] 18: mov x2, #0x2d18 // #11544 0.81 movk x2, #0x6500, lsl #16 0.62 movk x2, #0xf17f, lsl #32 0.94 ldr x2, [x2] 0.04 asr w3, w0, #0 0.94 add x2, x2, #0x8 0.06 mov x4, x1 0.86 cmp w3, #0x8 ↓ b.lt 124 0.69 ldr q16, [x2] 0.60 cmp w3, #0x10 ↓ b.le 94 0.77 sub w0, w3, #0x10 0.04 mov w2, w0 0.66 add x0, x1, x2 0.06 movi v17.16b, #0xf 0.66 ldr q18, instance int32 [benchapp] Benchmarks::Medium()[OptimizedTier1]+0x1b0 nop 3.94 60: ldr q19, [x4] 2.87 and v20.16b, v19.16b, v17.16b 0.11 tbl v20.16b, {v16.16b}, v20.16b 2.38 sshr v19.16b, v19.16b, #4 1.52 tbl v19.16b, {v18.16b}, v19.16b 1.56 and v19.16b, v20.16b, v19.16b 1.74 umaxp v20.4s, v19.4s, v19.4s 1.31 mov x2, v20.d[0] 3.00 cmp x2, #0x0 ↓ b.ne 178 4.42 add x4, x4, #0x10 2.72 cmp x4, x0 ↑ b.cc 60 0.54 94: sub w0, w3, #0x8 0.66 mov w0, w0 0.09 add x0, x1, x0 0.62 cmp x4, x0 0.02 csel x4, x0, x4, hi // hi = pmore 0.60 ldr x2, [x4] 0.43 mov v17.d[0], x2 0.96 ldr x2, [x0] 0.75 mov v17.d[1], x2 0.84 movi v18.16b, #0xf 0.04 and v18.16b, v17.16b, v18.16b 0.58 tbl v16.16b, {v16.16b}, v18.16b 0.71 ldr q18, instance int32 [benchapp] Benchmarks::Medium()[OptimizedTier1]+0x1b0 1.56 sshr v17.16b, v17.16b, #4 0.73 tbl v17.16b, {v18.16b}, v17.16b 0.09 and v16.16b, v16.16b, v17.16b 0.88 umaxp v17.4s, v16.4s, v16.4s mov x2, v17.d[0] 0.86 cmp x2, #0x0 ↓ b.eq 170 8.57 cmeq v16.16b, v16.16b, #0 0.06 mvn v16.16b, v16.16b 0.66 shrn v16.8b, v16.8h, #4 mov x2, v16.d[0] 0.64 rbit x2, x2 clz x2, x2 0.51 lsr w2, w2, #2 0.62 cmp w2, #0x8 ↓ b.ge 19c 38.82 108: sub x1, x4, x1 add w0, w1, w2 0.81 110: ldp x29, x30, [sp], #16 ← ret 118: mov x1, xzr mov w0, wzr ↑ b 18 124: mov w0, w0 add x0, x1, x0 cmp x1, x0 ↓ b.eq 170 134: ldrb w3, [x4] add x5, x2, #0x20 asr w6, w3, #5 mov w7, #0x1 // #1 lsl w3, w7, w3 ldrsb wzr, [x5] ldr w5, [x5, w6, uxtw #2] tst w5, w3 ↓ b.ne 168 add x4, x4, #0x1 cmp x4, x0 ↑ b.ne 134 ↓ b 170 168: sub x0, x4, x1 ↑ b 110 170: mov w0, #0xffffffff // #-1 ↑ b 110 178: cmeq v17.16b, v19.16b, #0 mvn v16.16b, v17.16b shrn v18.8b, v16.8h, #4 mov x3, v18.d[0] rbit x0, x3 clz x0, x0 sub x1, x4, x1 add w0, w1, w0, lsr #2 ↑ b 110 19c: mov x4, x0 sub w2, w2, #0x8 ↑ b 108 Samples: 5K of event 'cpu-clock', 999 Hz, Event count (approx.): 5010010005, [percent: local period] instance void [benchapp-Job-RTQYDZ-1Emitted] BenchmarkDotNet.Autogenerated.Runnable_0::WorkloadActionUnroll(int64)[Optimized]() /tmp/jitted-45672-25541.so Percent stp x29, x30, [sp, #-48]! stp x19, x20, [sp, #16] stp x21, x22, [sp, #32] mov x29, sp mov x19, x0 mov x20, x1 mov x21, xzr cmp x21, x20 ↓ b.ge 1e8 0.90 24: ldp x1, x22, [x19, #56] ldr x0, [x1, #8] ldr x1, [x1, #24] 1.35 → blr x1 2.70 stlur w0, [x22, #56] 2.25 ldr x0, [x19, #64] add x22, x0, #0x38 1.80 ldr x1, [x19, #56] 1.35 ldr x0, [x1, #8] ldr x1, [x1, #24] 0.45 → blr x1 2.25 stlr w0, [x22] 1.35 ldr x0, [x19, #64] add x22, x0, #0x38 0.90 ldr x1, [x19, #56] 1.80 ldr x0, [x1, #8] 0.90 ldr x1, [x1, #24] → blr x1 0.90 stlr w0, [x22] 0.45 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] ldr x0, [x1, #8] 0.90 ldr x1, [x1, #24] 0.45 → blr x1 1.80 stlr w0, [x22] 0.45 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] 2.70 ldr x0, [x1, #8] 0.90 ldr x1, [x1, #24] 1.35 → blr x1 2.70 stlr w0, [x22] 0.45 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] 1.35 ldr x0, [x1, #8] 1.35 ldr x1, [x1, #24] 0.45 → blr x1 2.25 stlr w0, [x22] 1.80 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] 0.90 ldr x0, [x1, #8] 0.45 ldr x1, [x1, #24] 1.35 → blr x1 2.25 stlr w0, [x22] 0.90 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] 0.90 ldr x0, [x1, #8] 0.45 ldr x1, [x1, #24] → blr x1 1.80 stlr w0, [x22] 1.35 ldr x0, [x19, #64] 0.90 add x22, x0, #0x38 0.90 ldr x1, [x19, #56] 0.45 ldr x0, [x1, #8] 1.35 ldr x1, [x1, #24] 1.80 → blr x1 2.25 stlr w0, [x22] 0.90 ldr x0, [x19, #64] add x22, x0, #0x38 2.70 ldr x1, [x19, #56] 0.90 ldr x0, [x1, #8] 0.90 ldr x1, [x1, #24] 1.80 → blr x1 2.70 stlr w0, [x22] ldr x0, [x19, #64] 0.45 add x22, x0, #0x38 0.90 ldr x1, [x19, #56] ldr x0, [x1, #8] 0.45 ldr x1, [x1, #24] → blr x1 2.25 stlr w0, [x22] 1.35 ldr x0, [x19, #64] add x22, x0, #0x38 0.90 ldr x1, [x19, #56] 0.90 ldr x0, [x1, #8] 0.45 ldr x1, [x1, #24] → blr x1 1.80 stlr w0, [x22] 0.45 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] ldr x0, [x1, #8] ldr x1, [x1, #24] 0.90 → blr x1 1.35 stlr w0, [x22] 1.80 ldr x0, [x19, #64] add x22, x0, #0x38 0.90 ldr x1, [x19, #56] 0.45 ldr x0, [x1, #8] 1.80 ldr x1, [x1, #24] 1.35 → blr x1 3.15 stlr w0, [x22] 0.90 ldr x0, [x19, #64] add x22, x0, #0x38 0.45 ldr x1, [x19, #56] 0.90 ldr x0, [x1, #8] 0.45 ldr x1, [x1, #24] 0.90 → blr x1 0.90 stlr w0, [x22] 1.35 ldr x0, [x19, #64] add x22, x0, #0x38 0.90 ldr x1, [x19, #56] 0.45 ldr x0, [x1, #8] ldr x1, [x1, #24] 0.45 → blr x1 1.35 stlr w0, [x22] add x21, x21, #0x1 0.45 cmp x21, x20 ↑ b.lt 24 1e8: ldp x21, x22, [sp, #32] ldp x19, x20, [sp, #16] ldp x29, x30, [sp], #48 ← ret Samples: 5K of event 'cpu-clock', 999 Hz, Event count (approx.): 5010010005, [percent: local period] stub<18824> Allocate() /tmp/jitted-45672-24621.so 36.36 ldr x11, stub<18824 63.64 → br x11 dmb ishld ldr x12, stub<18824 ldr x11, stub<18824 → br x11